A continuous-time programmable digital FIR filter
Y. W. Li, K. L. Shepard, and Y. P. Tsividis, “A continuous-time programmable digital FIR filter” Custom Integrated Circuits Conference, 2005.
Author Archive for: awp-admin
Entries by awp-admin
Continuous-time DSP, Analog/digital computers and other mixed-domain circuits
Y. P. Tsividis, G. Cowan, Y. W. Li, and K. L. Shepard, “Continuous-time DSP, Analog/digital computers and other mixed-domain circuits” European Solid-State Circuits Conference, September, 2005.
Continuous-time digital signal processors
Y. W. Li, K. L. Shepard, and Y. P. Tsividis, “Continuous-time digital signal processors” Proceedings of the International Symposium on Asynchronous Circuits and Systems, 2005, pp. 138-143.
1.1-1.6 GHz distributed differential oscillator global clock network
S. C. Chan, K. L. Shepard, and P. J. Restle, “1.1-1.6 GHz distributed differential oscillator global clock network” Digest of Technical Papers, International Solid-State Circuits Conference, 2005.
High-tension power delivery: operating 180-nm CMOS digital logic at a 5.4-V supply
S. Rajapandian, K. L. Shepard, P. Hazucha, and T. Karnik, “High-tension power delivery: operating 180-nm CMOS digital logic at a 5.4-V supply” Digest of Technical Papers, International Solid-State Circuits Conference, 2005
Uniform-phase, uniform-amplitude resonant-load global clock distribution
S. C. Chan, K. L. Shepard, and P. J. Restle, “Uniform-phase, uniform-amplitude resonant-load global clock distribution” IEEE Journal of Solid-State Circuits, January, 2005
Active CMOS biochip for time-resolved fluorescence detection
G. Patounakis, K. L. Shepard, and R. Levicky, “Active CMOS biochip for time-resolved fluorescence detection” Symposium on VLSI Circuits, 2005.
Near speed-of-light on-chip interconnects using pulsed current-mode signalling
A. P. Jose, G. Patounakis, and K. L. Shepard, “Near speed-of-light on-chip interconnects using pulsed current-mode signalling” Symposium on VLSI Circuits, 2005.
Full-chip, three-dimensional, shapes-based RLC extraction
D. Sitaram, Y. Zheng, and K. L. Shepard “Full-chip, three-dimensional, shapes-based RLC extraction” IEEE Transactions on CAD, May 2004
Design of an asynchronous micropipelined datapath with heterogeneous dynamic voltage scaling
Y. Li, G. Patounakis, K. L. Shepard, and S. M. Nowick, “Design of an asynchronous micropipelined datapath with heterogeneous dynamic voltage scaling ” IEEE Journal of Solid-State Circuits, April, 2004
