High-tension power delivery: operating 180-nm CMOS digital logic at a 5.4-V supply
S. Rajapandian, K. L. Shepard, P. Hazucha, and T. Karnik, “High-tension power delivery: operating 180-nm CMOS digital logic at a 5.4-V supply” Digest of Technical Papers, International Solid-State Circuits Conference, 2005