A 4.8 GHz Resonant Global Clock Distribution
S. C. Chan, P. J. Restle, K. L. Shepard, N. James, and R. Franch, “A 4.8 GHz Resonant Global Clock Distribution” Digest of Technical Papers, International Solid-State Circuits Conference, 2004.
S. C. Chan, P. J. Restle, K. L. Shepard, N. James, and R. Franch, “A 4.8 GHz Resonant Global Clock Distribution” Digest of Technical Papers, International Solid-State Circuits Conference, 2004.
S. C. Chan, K. L. Shepard, and P. J. Restle, “Design of resonant global clock distributions” Proceedings of International Conference on Computer Design, 2003.
Y. Li, G. Patounakis, A. Jose, K. L. Shepard and S. M. Nowick, “Asynchronous datapath with software-controlled on-chip adaptive voltage scaling for multirate signal processing applications” Proceedings of the International Symposium on Asynchronous Circuits and Systems, 2003, pp. 216-225.
S. Rajapandian, Z. Xu, and K. L. Shepard, “Charge-recycling voltage domains for energy-efficient low-voltage operation of digital CMOS circuits” Proceedings of International Conference on Computer Design, 2003.
Y. Zheng and K. L. Shepard, “On-chip oscilloscopes for noninvasive time-domain measurement of waveforms in digital integrated circuits” IEEE Transactions on VLSI, June, 2003, pp. 336-344.
Y. Li, G. Patounakis, K. L. Shepard, “High-throughput asynchronous datapath with software-controlled voltage scaling” VLSI Circuits Symposium, 2003, pp. 49-52.
Steven C. Chan, K. L. Shepard, and Dae-Jin Kim, “Static noise analysis for digital integrated circuits in partially depleted silicon-on-insulator technology” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, August, 2002, pages 916-927.
Dipak Sitaram, Yu Zheng, and K. L. Shepard, “Implicit treatment of substrate and power-ground losses in return-limited inductance extraction” Proceedings of the International Conference on Computer-Aided Design, 2002, pp. 94-99.
K. L. Shepard and Yu Zheng, “On-chip oscilloscopes for noninvasive time-domain measurement of waveforms” Proceedings of the International Conference on Computer Design, September, 2001, pp. 221-226. Best paper award winner
K. L. Shepard and D.-J. Kim “Body-voltage estimation in digital PD-SOI circuits and its application to static timing analysis” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, July, 2001, pages 888-901.