Harmony: A methodology for noise analysis in deep submicron digital integrated circuits

K. L. Shepard, V. Narayanan, and R. Rose, “Harmony: A methodology for noise analysis in deep submicron digital integrated circuits” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, August, 1999, pages 1132 – 1150.

Body-voltage estimation in digital PD-SOI circuits and its application to static timing analysis

K. L. Shepard and D.-J. Kim, “Body-voltage estimation in digital PD-SOI circuits and its application to static timing analysis” Proceedings of the International Conference on Computer-Aided Design, 1999, pages 531-538

Return-limited inductances: A Practical Approach to On-Chip Inductance Extraction

K. L. Shepard and Z. Tian, “Return-limited inductances: A Practical Approach to On-Chip Inductance Extraction” Proceedings of the 1999 Custom Integrated Circuits Conference.

Interconnect Parasitic Extraction in the Digital IC Design Methodology

M. Kamon, S. McCormick, and K. L. Shepard, “Interconnect Parasitic Extraction in the Digital IC Design Methodology” Proceedings of the International Conference on Computer-Aided Design, 1999, pages 223-230.

The challenge of high-performance, deep-submicron design in a turnkey ASIC environment

K. L. Shepard, “The challenge of high-performance, deep-submicron design in a turnkey ASIC environment” Proceedings of the 1998 International ASIC conference, pp. 183-186. (invited)

A 400-MHz S/390 microprocessor

C. F. Webb, C. J. Anderson, L. Sigal, K. L. Shepard, J. S. Liptay, J. D. Warnock, B. Curran, B. W. Krumm, M. D. Mayo, P. J. Camporese, E. M. Schwarz, M. S. Farrell, P. J. Restle, R. M. Averill III, T. J. Slegel, W. V. Huott, Y. H. Chan, B. Wile, T. N. Nguyen, P. G. Emma, D. K. Beece, C.-T. Chuang, and C. Price, “A 400-MHz S/390 microprocessor” IEEE Journal of Solid-State Circuits, November, 1997, pages 1665-1675.

Practical Issues of Interconnect Analysis in Deep Submicron Integrated Circuits

K. L. Shepard, “Practical Issues of Interconnect Analysis in Deep Submicron Integrated Circuits” Proceedings of the International Conference on Computer Design, 1997, pages 532-541

Global Harmony: Coupled noise analysis for full-chip RC interconnect networks

K. L. Shepard, V. Narayanan, P. C. Elmendorf, and Gutuan Zheng, “Global Harmony: Coupled noise analysis for full-chip RC interconnect networks” Proceedings of the International Conference on Computer-Aided Design, 1997, pages 139-146