Interconnect Parasitic Extraction in the Digital IC Design Methodology

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M. Kamon, S. McCormick, and K. L. Shepard, “Interconnect Parasitic Extraction in the Digital IC Design Methodology” Proceedings of the International Conference on Computer-Aided Design, 1999, pages 223-230.

The challenge of high-performance, deep-submicron design in a turnkey ASIC environment

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K. L. Shepard, “The challenge of high-performance, deep-submicron design in a turnkey ASIC environment” Proceedings of the 1998 International ASIC conference, pp. 183-186. (invited)

Design methodologies for noise in digital integrated circuits

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K. L. Shepard, “Design methodologies for noise in digital integrated circuits” Proceedings of the Design Automation Conference, 1998, pp. 94-99.

A 400-MHz S/390 microprocessor

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C. F. Webb, C. J. Anderson, L. Sigal, K. L. Shepard, J. S. Liptay, J. D. Warnock, B. Curran, B. W. Krumm, M. D. Mayo, P. J. Camporese, E. M. Schwarz, M. S. Farrell, P. J. Restle, R. M. Averill III, T. J. Slegel, W. V. Huott, Y. H. Chan, B. Wile, T. N. Nguyen, P. G. Emma, D. K. Beece, C.-T. Chuang, and C. Price, “A 400-MHz S/390 microprocessor” IEEE Journal of Solid-State Circuits, November, 1997, pages 1665-1675.

Practical Issues of Interconnect Analysis in Deep Submicron Integrated Circuits

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K. L. Shepard, “Practical Issues of Interconnect Analysis in Deep Submicron Integrated Circuits” Proceedings of the International Conference on Computer Design, 1997, pages 532-541

Global Harmony: Coupled noise analysis for full-chip RC interconnect networks

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K. L. Shepard, V. Narayanan, P. C. Elmendorf, and Gutuan Zheng, “Global Harmony: Coupled noise analysis for full-chip RC interconnect networks” Proceedings of the International Conference on Computer-Aided Design, 1997, pages 139-146

A 400MHz S/390 Microprocessor

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C. F. Webb, C. J. Anderson, L. Sigal, K. L. Shepard, J. S. Liptay, J. D. Warnock, B. Curran, B. W. Krumm, M. D. Mayo, P. J. Camporese, E. M. Schwarz, M .S. Farrell, P. J. Restle, R. M. Averill, III, T. J. Slegel, W. V. Huott, Y. H. Chan, B. Wile, and P. Emma “A 400MHz S/390 Microprocessor” Proceedings of the International Solid-State Circuits Conference, 1997, pages 168-169.

Design Methodology for the High-Performance G4 3/390 Microprocessor

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K. L. Shepard, S. Carey, D. K. Beece, R. Hatch, and G. Northrop, “Design Methodology for the High-Performance G4 3/390 Microprocessor” Proceedings of the International Conference on Computer Design, 1997, pages 232-240