Integrated Power Electronics
Delivering power to integrated circuits is becoming an increasingly complex challenge. On the high end, chips can demand in excess of 150 W of power at supply voltages of less than 1 V, leading to current demands approaching 200 A. We have been developing on-chip DC-DC conversion approaches that allow power to be delivered to chips at higher voltages and lower current levels. Such technology will enable improved efficiency by reducing I2R losses in the power distribution network, reducing required voltage tolerances with improved regulation and facilitating system-level power saving techniques such as dynamic voltage and frequency scaling. Recently, we have developed integrated dc-dc converter that take advantage of integrated magnetics and hybrid integration of wide-bandgap GaN transistors.
Kevin Tien, Noah Sturcken, Naigang Wang, Jae-woong Nah, Bing Dang, Eugene O’Sullivan, Paul Andry, Michele Petracca, Luca P. Carloni, William Gallagher, Kenneth Shepard “An 82%-Efficient Multiphase Voltage-Regulator 3D Interposer with On-Chip Magnetic Inductors,” VLSI Circuits Digest of Technical Papers, 2015 Symposium on, vol., no., pp.1,2, 16-19 June 2015.
This paper presents a three-dimensional (3D) fully integrated high-speed multiphase voltage regulator. A complete switched-inductor regulator is integrated with a four-plane NoC in a two-high chip stack combining integrated magnetics, through-silicon vias (TSVs), and 45-nm SOI CMOS devices. Quasi-V2 hysteretic control is implemented over eight injection-locked fixed-frequency phases to achieve fast response, steady-state regulation, and fixed switching frequency. Peak efficiency of 82% for conversion from 1.66 V to 0.83 V is observed at a 150 MHz per-phase switching frequency. This is the first demonstration of high-speed voltage regulation using on-chip magnetic-core inductors in a 3D stack and achieves sub-μs dynamic supply voltage scaling for high-density embedded processing applications.
Noah Sturcken, Ryan Davies, Hao Wu, Michael Lekas, Maurizio Arienzo, Kenneth Shepard, K.W. Cheng, C.C. Chen, Y.S. Su, C.Y. Tsai, K.D. Wu, J.Y. Wu, Y.C. Wang, K.C. Liu, C.C. Hsu, C.L. Chang, W.C. Hua, Alex Kalnitsky, “Magnetic Thin-Film Inductors for Monolithic Integration with CMOS,” Proceedings of the International Electron Device Meeting 2015
This paper presents the fabrication, design and electrical performance of magnetic thin-film inductors for monolithic integration with CMOS for DC-DC power conversion. Magnetic core inductors were fabricated using conventional CMOS processes to achieve peak inductance density of 290nH/mm2 , quality factor 15 at 150MHz, current density exceeding 11A/mm2 and coupling coefficient of 0.89 for coupled inductors.